Udai Rathore in Sydney, New South Wales works at University of Sydney (FPGA Engineer) and was educated at University of Sydney.
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University of Sydney
Oct 2020 - Present 4 months , FPGA engineer working at the Jericho Smart Sensing Lab as a part of the Eggleton research group.
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Present
FPGA Engineer
University of Sydney
Aug 2019 - Nov 2020 1 year 4 months , Sydney, Australia , Tutor in the Faculty of Engineering
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Nov 2020
Academic Tutor
International House, University of Sydney
Sep 2018 - Jul 20201 year 11 months
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Jul 2020
Peer Tutor
University of Sydney
2018
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2020
Master of Professional Engineering. Electrical (Computer & Embedded Systems Engineering)
Savitribai Phule Pune University
2013
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2017
Bachelor of Engineering - BE. Electronics and Telecommunications. First Class with Distinction
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AT UNIVERSITY OF SYDNEY