Han Guo in Adelaide works at ASTC (Senior Consultant - IC and FPGA Design) and was educated at University of Auckland.
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ASTC
2014 - Present
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Present
Senior Consultant - IC and FPGA Design
ChronoLogic Pty Ltd.
2012 - 2014
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Snr. FPGA Engineer
ASTC
2009 - 2012
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Design and Verification Consultant
University of Auckland
1997
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1998
Master of Engineering (M.Eng.). Electrical and Electronics Engineering
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